Design of Digital Circuits SS10

 

This is the archive for the Spring Semester 2010 Course
for up to date information please visit : Digitaltechnik_11

252-0014-00L (6 ECTS)
Lectures: Fri 13:15-16:00, HG E 3
Exercises: Fri 8:15-10:00, CAB H56, H57, H52, H53
Exercises second slot: Mon 10:15-12:00, CAB H56, H57, CNB H100.5

People:

Course responsible:
Prof. Dr. Srdjan Capkun, ETHZ <capkuns@inf.ethz.ch>
Dr. Lisa (Ling) Liu, ETHZ <ling.liu@inf.ethz.ch>

Teaching assistants:
Dr. Aurelien Francillon <aurelien.francillon@inf.ethz.ch>
Dr. Frank K. Gurkaynak <kgf@ee.ethz.ch>
Robin Stoll <rstoll@ethz.ch>

Student teaching assistants:
Onur Babacan <obabacan@student.ethz.ch>
Luka Malisa <malisal@student.ethz.ch>
Pascal Sachs <psachs@student.ethz.ch>
Dan Tecu <tecud@student.ethz.ch>
Johann Wolf <jowolf@student.ethz.ch>
Simon Gerber <simugerber@student.ethz.ch>

Schedule:

Lectures (13 weeks): 26.02.2010; 05.03.; 12.03.; 19.03.; 26.03.; 16.04.; 23.04.; 30.04.; 07.05.; 14.05.; 21.05.; 28.05.; 04.06.

Exercises (12 weeks): First two exercise sessions (05.03, 12.03) replaced by homework assignments.
There is two slots :
Monday 10:15-12:00 or Friday 8:15-10:00
Exercises Friday start on 19.03.; 26.03.; 16.04.; 23.04.; 30.04.; 07.05.; 14.05.; 21.05.; 28.05.; 04.06.
Exercises Monday start on 15.03.; 22.03.; 12.04.; 19.04.; 26.04.; 03.05.; 10.05.; 17.05.; 31.05.; 07.06.

Content:

About the course:
The course provides an introduction to the design of digital circuits and computer architecture. The course covers the basics of the technical foundations of gates, an introduction to hardware description languages (and their use in the design process), and introduces processor and computer architecture.

Course content:
- Basic Gates
- Combinational Logic Design
- Sequential Logic Design
- Hardware Description Languages
- Digital Building Blocks
- Computer Architecture
- Microarchitecture

Literature:
The course closely follows the following textbook: Digital Design and Computer Architecture (David Harris and Sarah Harris), Language: English, ISBN-10: 0123704979. This book is available online (within ETH and from home using an ETH VPN connection) - link. The course will (roughly) cover the first 7 chapters of the book.

Evaluation / requirements:

Evaluation:
Written exam (90 minutes). It will be scheduled in the exam period (sessionsprüfung). In the case that you cannot make it to the exam for any reason, please contact the pruefungsplanstelle (+41 44 632 20 68).

Exercises:
- The students are required to hand in 75% of the exercises to access the exam. The exam will include questions related to the exercises.

Schedule (Follow the links for lecture slides, exercise instructions and solutions):

Theoretical exercises are given at the end of the lecture and need to be handed-in at the beginning of the following lecture. Solutions to the theoretical exercises (TS) are posted one week after the exercise is given. Practical exercises (Lab) need to be submitted to the assistants during the exercise sessions and according to the schedule. TS: X.Y refers to the exercise X.Y in the course book (Digital Design and Computer Architecture). Reading X.Y refers to the chapter X.Y of the course book. For the instructions on the practical exercises follow the links below.

To access the content use your ETHZ credentials.

For the Lab exercises it is possible to use :

• Pre-configured computers in the lab rooms.
• Use a Pre-configured virtual machine on your computer (Instructions: SS10_Installation_VM.pdf).
• Install yourself the software (SS10_Installation.pdf) on your own computer.

Lab groups : DD2010_Students_Groups.pdf (updated 12/03/2010)

The practical exercises partially come from the results of the ICES project in Native System Group (http://www.nativesystems.inf.ethz.ch/WebHomeResearchIces)