Design of Digital Circuits SS12

 

252-0014-00L (6 ECTS)
Lectures: Fri 13:15-16:00, HG F 3

Lab Exercises: The Lab exercises will take place at HG E26.1 and HG E 26.3 on Tuesdays 0815-1000, Wednesdays 1315-1500 and Thursdays 1515-1700.
Lab groups PDF

People:

Course responsible:
Prof. Dr. Srdjan Capkun, ETHZ <capkuns@inf.ethz.ch>
Dr. Frank K. Gurkaynak, ETHZ <kgf@ee.ethz.ch>

Teaching assistants:
Aanjhan Ranganathan <raanjhan@inf.ethz.ch>
Luka Malisa <luka.malisa@inf.ethz.ch>
Marcela Zuluaga <marcela.zuluaga@inf.ethz.ch>

Student teaching assistants:
François Serre <serref@student.ethz.ch>
Der-Yeuan <dyu@student.ethz.ch>
Jonas Zehnder <zehndejo@student.ethz.ch>
Samuel Bryner <brynersa@student.ethz.ch>
Claudio Foellmi <foellmic@student.ethz.ch>

Content:

About the course:
The course provides an introduction to the design of digital circuits and computer architecture. The course covers the basics of the technical foundations of gates, an introduction to hardware description languages (and their use in the design process), and introduces processor and computer architecture.

Course content:
- Basic Gates
- Combinational Logic Design
- Sequential Logic Design
- Hardware Description Languages
- Digital Building Blocks
- Computer Architecture
- Microarchitecture

Literature:
The course closely follows the following textbook: Digital Design and Computer Architecture (David Harris and Sarah Harris), Language: English, ISBN-10: 0123704979. This book is available online (within ETH and from home using an ETH VPN connection). The course will (roughly) cover the first 7 chapters of the book.

Solutions to Exercise problems: All chapters solutions [PDF]

Evaluation / requirements:

Evaluation:
Written exam (90 minutes). It will be scheduled in the exam period (sessionsprüfung). In the case that you cannot make it to the exam for any reason, please contact the pruefungsplanstelle (+41 44 632 20 68).

Lecture Schedule

To access the content use your ETHZ credentials.

Lab Exercises

Xilinx ISE software (for the labs) installation instructions for students who wish to work from their own laptops/desktops will be uploaded later. Sorry for the inconvenience caused. For the adventurous, you can try installing Xilinx ISE 13.4 Webpack edition from here.

Next Lab Schedules

• Lab 6: "Develop a MIPS assembly program" - Wed (2/5), Thu (3/5), Tue (8/5) [Note: Due to May 1st being a holiday, Tuesday batch students please note the changes to your dates ]
• Lab 7a: "Building the MIPS processor" - Wed (9/5), Thu (10/5), Tue (15/5)
• Lab 7b: "The Performance of MIPS" - Tue (22/5), Wed (23/5), Thu (24/5)
• (Optional) Lab 7c: "Interfacing with the World" - Tue (29/5), Wed (30/5), Thu (31/5) [Note:These days can be used to wrap up all remaining labs, ask your doubts to the assistants and say "bye bye" to us ;-) . Lab 7c is optional.]